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Rating Stats for

Robert Crovella

Rating
1642.70 (671st)
Reputation
101,824 (716th)
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Title Δ
When to use volatile with shared CUDA Memory 0.00
Anyone know the mechanism of warp retirement in nvidia products(Kep... 0.00
Can I access device global memory from a host? 0.00
Could someone explain nVidia GPU architecture to me? 0.00
Random generator & CUDA 0.00
cuda 5.0 linking error: undefined reference to __cudaRegisterLInked... 0.00
Global array of vector type work-around 0.00
CUDA thrust reduce is so slow? 0.00
Cuda Random Number Generation 0.00
Number of concurrent kernels in Kepler 0.00
Concurrently Initializing many arrays with random numbers using Cur... 0.00
Is cudaMemcpy2D limited in Size? 0.00
How to set breakpoints both in Host and Device code 0.00
vector step addition slower on cuda 0.00
CUDA ILP, instruction fetch, pipelining and branching 0.00
CUDA and time out in Windows, looks like multi-gpus can solve this? 0.00
cudaMallocHost is failing to allocate even the smallest of memory 0.00
I have two GPUs, how can I just let one to do certain CUDA task? 0.00
Will cudaStreamWaitEvent block the host? 0.00
wrong results in cudaMemcpyDeviceToHost 0.00
Cuda program does not give the correct output when using a CUDA com... 0.00
3D indices access in CUDA for nonlinear diffusion 0.00
CUDA median calculation through reduction -0.08
CUDA warp / block finalization 0.00
CUDA parallel threads 0.00
reading cuda data in burst mode 0.00
cuda: allocating array of pointers to images and the images 0.00
Using clock() function in CUDA 0.00
create a class object inside a global kernel using new and double p... -0.17
How do I copy the row_indices from a COO matrix to a thrust vector... 0.00
CUDA: commands don't work after nvcc -0.52
Cuda kernel function and cudaMemcpy 0.00
Behaviour of concurrent kernel and CUDA streams 0.00
When is padding for shared memory really required? -0.38
Cuda: Using shared memory for counting elements -0.53
CUDA Global Array declaration and initialization before kernel call... +0.44
How to mark a function callable from host and device? 0.00
How is the 2D thread blocks padded for warp scheduling? 0.00
Is coalescing triggered for accessing memory in reverse order? +0.44
cusp::io::write_matrix_market_file() gives Access Violation Exception +0.44
Determine Max Threads dynamically in CUDA? -1.24
Wrapping Thrust Device Vectors in a struct? 0.00
Cuda Stream Processing for multiple kernels Disambiguation 0.00
Copy symbol address to symbol -0.07
Read cudaArray in device code 0.00
How do you specify __device__ and __forceinline options at the same... 0.00
3d CUDA kernel indexing for image filtering? 0.00
Slow performance of CUDA kernel vs CPU version for Julia set 0.00
Where to find CUDA's cutil_math.h? 0.00
What's the mechanism of the warps and the banks in CUDA? 0.00