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Rating Stats for

Peter Cordes

Rating
1575.42 (3,453rd) 		Reputation
156,434 (349th)
Page: 1 ... 60 61 62 63 64 ... 92
Title Δ
diassemble strings properly in shellcode +0.45
What is the penalty of mixing EVEX and VEX encoded scheme? 0.00
Unpack m128i/m256i to m64 (MMX, SSE2, AVX2) 0.00
OsDev syscall/sysret and sysenter/sysexit instructions enabling +0.77
Strange 'asm' operand has impossible constraints error 0.00
GCC Inline-Assembly Error: "Operand size mismatch for 'int... +0.08
What (bad) can happen if I don't issue _mm_sfence() after _mm_c... 0.00
How does X86 CPU translate an address to an IO such as VGA text buf... +0.41
AVX unpackhipd/unpacklopd analogue for whole 256 bit register +0.39
Can I pass unaligned size to _mm_malloc? +0.30
Why does "noreturn" function return? -1.83
Does std::atomic provide atomic behavior, regardless of ordering? 0.00
Instruction reordering in x86 / x64 asm - performance optimisation... 0.00
Why don't compilers merge redundant std::atomic writes? +1.05
Mac OSX minumum support sse version 0.00
Can't restore the original behavior from the decompiled simple... 0.00
Implementation of bit rotate operators using SIMD in CUDA -0.58
the sum of two arrays n bytes each -2.00
How does the CPU reads a double value? 0.00
What method does the computer use to add unsigned integers +2.28
Is it possible to read a value from memory being written by another... 0.00
How to read an arbitrary pointer from the stack with a format strin... -1.27
How to set the alignment for the .data section? 0.00
Efficient (on Ryzen) way to extract the odd elements of a __m256 in... 0.00
error: use of undeclared identifier '_mm_shuffle_epi8' Ubun... 0.00
What is the correct way to access Tag Word in FPU? 0.00
Conditional instructions in AVX2 -1.74
Printing an integer as a string with AT&T syntax, with Linux sy... -2.41
Is CPU speed limited by the speed of fetching instructions from mem... +0.04
Usage of AVX512-CD -0.58
Create/Write to file x86 Linux -2.45
Was there a 'git' in the 1990s? 0.00
Why is this AVX code slower? 0.00
Efficient implementation of log2(__m256d) in AVX2 +0.46
Why is XCHG reg, reg a 3 micro-op instruction on modern Intel archi... 0.00
Euclidean distance using intrinsic instruction 0.00
acos(double) gives different result on x64 and x32 Visual Studio +1.09
New to x86 (Adding) 0.00
CPU cache: does the distance between two address needs to be smalle... -0.55
selected processor does not support `swp x1,x1,[x0]' 0.00
Why doesn't GCC optimize out deletion of null pointers in C++? -0.89
Where does the scheduler run? -0.35
How exactly do partial registers on Haswell/Skylake perform? Writin... 0.00
How to pack 16 16-bit registers/variables on AVX registers +1.58
How to set bits of a bit vector efficiently in parallel? -0.06
Fastest downscaling of 8bit gray image with SSE +2.55
Loop with function call faster than an empty loop +0.43
sse/avx equivalent for neon vuzp 0.00
Large (0,1) matrix multiplication using bitwise AND and popcount in... 0.00
Finding the memory location of a compile-time constructed class -1.85