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Rating Stats for

Peter Cordes

Rating
1575.42 (3,453rd)

Reputation
156,434 (349th)

Page: 1 ... 70 71 72 73 74 ... 92

Title	Δ
Differing CPUID usage from high-level languages	0.00
How can code be asyncronus on a single-core CPU which is synchronous?	+0.41
Permute content of AVX register	0.00
Atomicity on x86	+1.94
Alignment and SSE strange behaviour	0.00
How do I know whether MASM encodes my JMP instruction using a relat...	0.00
Why do I get a zombie when I link assembly code without stdlib?	0.00
Memory Model in C++ : sequential consistency and atomicity	-1.39
How do I test to ensure only an integer is entered and ensure lengt...	+2.00
How do I test to ensure only an integer is entered and ensure lengt...	-2.00
How to swap two __m128i variables in C++03 given its an opaque type...	+2.04
C/Assembly Subprogram Segmentation fault	0.00
StoreStore reordering happens when compiling C++ for x86	0.00
Leave padding between strings in the segment	0.00
Is there a SSE2 equivalent for _mm_insert_epi32?	0.00
Crash caused by invalid exception unwinding?	0.00
How to implement "Interlocked Compare exchange if less"?	0.00
A faster integer SSE unalligned load that's rarely used	0.00
Why do some of Intel's intrinsics take const immediates, while...	0.00
Shifting 4 integers right by different values SIMD	0.00
Is Haswell dual path execution CPU?	+1.85
likely()/unlikely() macros in the Linux kernel with a segmentation...	0.00
Why is fp division op slower than reciprocal op plus multiply op	0.00
Shorter loop, same coverage, why do I get more Last Level Cache Mis...	+0.45
Convert array of bits to set faster	-1.91
The advantages of using 32bit registers/instructions in x86-64	-0.48
Why does this delay-loop start to run faster after several iteratio...	+2.29
How exactly to count the hit rate of a direct mapped cache?	-0.04
Is there a way to increase a value in a xmm register?	+1.71
Assembler : Turn 3 lines into 1	+0.45
Segmentation fault basic assembly	0.00
how to get the cpu cache associativity settings on windows	0.00
Can instruction order happen cross function call?	0.00
C unsigned long long and imulq	+2.88
What is wrong with this emulation of CMPXCHG16B instruction?	+2.07
AVX2, How to Efficiently Load Four Integers to Even Indices of a 25...	0.00
convert array of uint64_t to __m256i	0.00
Code works when run from section .data, but segmentation faults in...	0.00
Unexpected result of subtracting a NASM macro in an expression	+0.45
How do I convert 32-bit NEON assembly to 64-bit?	0.00
Multithreading and OOO execution.	0.00
Trying to understand this short assembler instruction but I don'...	-0.57
Handling SIGCHLD NASM	-0.05
assembler set up function dependent on variable	0.00
x86-32 / x86-64 polyglot machine-code fragment that detects 64bit m...	0.00
sse and avx performance on Sandybridge and IvyBridge	0.00
What is going on with the stack pointer in this simple (disassemble...	0.00
What happens to registers when you manipulate them using asm code i...	+1.66
RGBA to ABGR: Inline arm neon asm for iOS/XCode	-0.84
The ordering of L1 cache controller to process memory requests from...	0.00