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srking

Rating
1534.87 (14,729th)
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2,842 (59,468th)
Page: 1
Title Δ
What is the size of the following declaration? -3.39
Extract Raw Machine Code of Function From .o Object File? 0.00
32 bit CRC with some inputs set to zero. Is this less accurate than... -3.77
How can I get the number of instructions executed by a program? -0.55
Distinguishing between code and data pages on x86_64 MMU 0.00
I can't seem to find what wrong with my code. [x86] 0.00
How to read the interrupt flag in x86 processor +1.36
Interrupt vector and irq mapping in do_IRQ -0.08
How to know if an interrupt is a hardware interrupt or a cpu except... 0.00
Error: invalid instruction suffix for `cmpxchg' 0.00
When is a CPU cache line flushed to memory after a write? +0.44
Interconnect between per-core L2 and L3 in Core i7 0.00
Better to encode ADD EAX,4 as r/m32 imm32 or r32 imm8? x86 assembly -4.51
Why is the Frame Check Sequence at the end of an Ethernet frame and... +3.34
Stack for iret and int instruction +3.70
Statically Defined IDT +3.73
Asterisk Pointer in Assembly (I32 / x86) 0.00
Is there any real benefit to padding instructions +3.58
Interrupt Coalescence 0.00
Does prefetching a write ever affect single core performance? +2.73
x86 Instruction Format: "ba 0e 00 00 00" ... "mov $0... 0.00
Does network stack on my computer use DMA? +3.77
Can CRC32 be used as a hash function? +4.01
Operating System - paging -4.39
What is the rationale behind the CPU instruction set? +4.76
Cache Memory Confusion 0.00
Does pinning a process to a CPU core or an SMP node help reduce cac... +4.32
carry/overflow & subtraction in x86 +3.86
When an interrupt occurs, what happens to instructions in the pipel... 0.00
Are two consequent CPU stores on x86 flushed to the cache keeping t... 0.00
Nested cmake library 0.00
Is there a program to change hex code to assembly code in x86? +2.67
How do I convert vector of strings into vector of integers in C++? -2.82
CMAKE - Debug / Crossbuild? -2.17
Off-chip memcpy? +1.84
Is CRC32 additive? +4.01
Error out on a block of code in bash +1.69
Can caches have limitations when dealing with devices? +1.62
What exception type should this be? 0.00
Is $0x1a a register here? -1.42
Why does GCC insert seemingly non-essential instructions? +4.38
Why does the IA-32 architecture push the EFLAGS register onto the s... 0.00
Why Not Hybrid Out-Of-Order, Massively Parallel? -2.11
What causes page faults? +1.87
Defining a static array of floats in C++ -1.94
Expected collisions for perfect 32bit crc +3.94
How should I mark the end of a TCP packet? +0.39