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Ross Ridge

Rating
1599.09 (1,818th)
Reputation
28,212 (4,439th)
Page: 1 2 3 4 ... 14
Title Δ
Why does the CPU get hotter when performing heavier calculations, c... +0.37
How is the .data segment loaded into a seperate memory area than th... 0.00
Problem with BIOS INT 13H (Read Sectors From Drive) 0.00
NASM rep nop assembles as pause 0.00
Why does SEG not give an error message with this code fragment? 0.00
When using the MOV mnemonic to load/copy a string to a memory regis... +2.01
What is a processor hint? 0.00
How does the CPU know how many bytes it should read for the next in... +1.53
Extra bytes at the end of a DOS .COM file, compiled with GCC -1.92
How to exchange top of stack with register without implicit lock on... -1.35
Why use the Global Offset Table for symbols defined in the shared l... +1.90
:lower16, :upper16 for aarch64; absolute address into register; -0.99
GOTPCREL(%rip) in GAS Intel syntax -1.93
NASM: Far Call with Segment and Offset Stored in Registers +1.59
What are descriptor registers? +2.00
Rationale behind code segment and data segment 0.00
How to link two object files by placing their respective sections a... 0.00
AT&T to inline asm in Visual Studio 2017 0.00
SYSRET vs SYSRETQ distinction and compatibility mode 0.00
How to push label in stack in a relocatable shared library which it... +1.92
What example is there for ASSUME dataregister : qualifiedtype [, da... 0.00
What language is this old program written in? 0.00
mov instruction fetches data from memory to memory in x86 assembly -2.32
Implementation of event listener - assembly vs high level language 0.00
Github page: readme before file list, not after? +0.36
Why this mov gs instruction causes a fault in VMWare Workstation gu... 0.00
Aligning a given instruction, but putting the alignment padding som... 0.00
What do prefixes like byte_ or off_ mean before a hex value? 0.00
x64: Is there an INX instruction? 0.00
Negative registers in arm assembly? 0.00
MASM: Force OFFSET directive not to be relocated 0.00
How to calculate the total size of a TSR block from multiple .asm f... 0.00
What is a retpoline and how does it work? -0.59
"Acknowledge interrupt on exit" control in VT-x causes CP... 0.00
How to set align 64 in ml64.exe? 0.00
Calculating padding length with GAS AT&T directives for a boot... -2.00
Get linear address of FS:[0] in 32-bit protected mode / MSVC inline... +1.46
Is INT13H (non extended) capable of accessing drives with more than... +2.00
Handling gcc's noexcept-type warning +0.38
What are the advantages of a frame pointer? +2.81
Can modern x86 hardware not store a single byte to memory? +0.79
Largest value a TBYTE can hold -0.79
MASM doesn't recognize my TLS callback 0.00
X86-asm code to make a usb disk non-bootable +0.33
Is vftable[0] stores the first virtual function or RTTI Complete Ob... 0.00
How does "+&r" differ from "+r"? 0.00
Symbol name conflicts with new register names in new NASM versions? 0.00
How to ERET to the same exception level in ARMv8? 0.00
converting gcc inline assembly to ml64 0.00
Values returned by E820h QuerySystemAddressMap on 4GB+ memory 0.00