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Rating Stats for

Andrea Tosoni

Rating
1475.18 (4,510,839th)

Reputation
307 (404,587th)

Page: 1

Title	Δ
What is the recommended way for carrying VHDL code around?	-3.49
TCL regex: How to use for multiple lines?	0.00
ALU implementation w/ ADDER	-3.54
Initializing ROM from array using functions, Synthesis ERROR (VHDL)	-3.68
Button with multiple command line arguments	-1.11
Recursive Tcl procedure does not return anything	+0.46
VHDL , Division using storing algorithm..the code is not working	-3.83
implementing a 50ns delay in VHDL	-4.23
Reading specific column of data from text file and write to another...	+4.34
Syntax error near Entity in a Package body	0.00
Generating 2 clock pulses in VHDL	+0.11
using TCL trace on a local variable of a proc	-3.27
How to implement a schematic in vhdl code and converting the dataty...	0.00
For loop is generating wrong values within testbench process?	0.00
VHDL code for turning 50MHz into 38KHz	-3.94
If...else error (newbie, VHDL)	0.00
Tcl pass args "as is" to proc	+1.07
VHDL - Increment with one (unsigned)	-3.72
VHDL - Add operation between Signed	0.00
What does 1-, 2-, or 3-process mean for an FSM in VHDL?	0.00
Possible contradiction in VHDL Std 1076?	0.00