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Rating Stats for

Hendrik

Rating
1509.44 (74,734th)

Reputation
1,172 (135,202nd)

Page: 1

Title	Δ
Regex syntax to check prefixes and suffixes	+4.46
Minimal sensitivity list in VHDL	-4.22
Fix Drupal 6 menu urls on test server	+0.23
To invoke code before loading eclipse splash screen	+0.10
Graphical VHDL Component Editor	0.00
Is process in VHDL reentrant?	-1.19
Connect components without signals	+4.05
VHDL recursive component/entity	0.00
How to represent array literals in VHDL?	+3.93
how to build eclipse rcp application from .product with ant on jenk...	-0.07
Loop for a Case	-0.02
How to limit the number of times a rule can repeat in XTEXT?	0.00
FPGA TCP implementation	-0.06
VHDL: Problem with unexpected IF	-3.80
VHDL convert statement to loop problem	0.00
Which best way to write vhdl parser on C#	0.00
Best way to learn VHDL?	-1.62
Is there a VHDL equivalent to Verilog's @(*), i.e., automatic proce...	-0.36
Is my VHDL sentence allowed?	-0.13
VHDL: Converting from floating point to fixed point explanation?	0.00
What is negation (not) of a bit vector in VHDL	-1.91
Passing Variables to procedure in VHDL	+1.98
Why does Modelsim 10 not compile older code?	0.00
VHDL explanation in words	0.00
RCP build with maven	+3.91
adding '1' to LOGIC_VECTOR in VHDL	+4.15
Starting work on a Pre-existing Project	0.00
Why IEEE vhdl standard library is not STL?	0.00