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Rating Stats for

Jan Gray

Rating
1509.95 (70,943rd)

Reputation
3,046 (55,505th)

Page: 1

Title	Δ
How can I calculate propagation delay through series of combination...	+4.10
What are the 'ref' and 'sealed' keywords in C++?	-1.26
Choosing CPU architecture for LLVM/CLANG	+3.57
Can I program the LUT5_D in virtex-5 FPGA with 2bit 2-to-1 mux func...	+0.50
how to determine the size of virtual base class and derived classes...	-2.91
Cache miss penalty in deep RISC pipeline	0.00
What are best practices for optimizing pipeline throughput for fpga...	-3.63
understanding vptr in multiple inheritance?	-1.83
Explicitly define how LUTs and slices are used in Xilinx XST tool?	+1.97
vftable performance penalty vs. switch statement	-1.73
.NET executable process walk through	0.00
4 questions about processor architecture. (Computer engineering)	+0.21
The Hashtable type in C# is implemented using chaining or open addr...	+1.74
Safely pausing of thread during GC in .NET	-2.25
Difference Swapping and Paging	+3.59
How can I access specific group of bits from a variable in C?	+3.55
Alternative virtual mechanism implementations?	+2.15
Fast Bloom Filters in C- 64bit Ints, High frequency Initialize/Quer...	-2.54
C: How to pass a double pointer to a function	-2.01
C++ : How can I know the size of Base class SubObject?	+4.17
can I check if a number is odd or even by using add and subract ins...	+0.24
Edit and Continue on GDB	-0.41
FPGA measure accurate times	0.00
Which kinds of low level facilities aren't typically supported on m...	0.00
Question about the NULL-Pointer Assignment Partition in a process'...	+4.54
How to get best performance of 8 core system using INTEL fortran	0.00
Sorting algorithm to sort the height of 1.14 billion people!	+4.49
Do compute tasks running on the GPU negatively affect graphics perf...	-3.97
.NET Memory size	-0.69
Simple data structure for the Othello board game?	+1.32
Which ARM architectures have Out-Of-Order-Execution?	-2.97
Questions about "this pointer adjustor" in C++ object lay...	0.00
is there any faster way to parse than by walk each byte?	0.00
FPGA Place & Route	0.00
Large Scale VHDL modularization techniques	0.00
Where in the Fetch-Execute cycle is a value via an address mode dec...	0.00
Do x86/x64 chips still use microprogramming?	0.00
memory layout c++ objects	0.00
Is there an updated version of "Writing Faster Managed Code: K...	0.00