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Rating Stats for

Margaret Bloom

Rating
1637.47 (743rd)

Reputation
23,262 (5,617th)

Page: 1 2 3 ... 12

Title	Δ
What is the exact difference and the relation between thread entry...	+1.85
Interrupt Nested, Sequencing	0.00
Does reading a debug register raise an exception if the GD flag is...	0.00
what is segment 00 in my Linux executable program (64 bits)	0.00
How can i convert a binary number into 2's complement without u...	+1.32
Linux default behavior of executable .data section changed between...	-0.55
XLA on CPU -- where do the gains come from?	0.00
VM Instructions If an exit is possible?	0.00
does multithreaded multicore cpu renders images faster than single...	-0.79
Format string attack - How to print argc value?	+0.32
How to bruteforce a lossy AND routine?	+0.31
What is intended/correct way to handle interrupts and use the WFI r...	-0.74
C++ SYSENTER x86 calls in inline assembly	+0.66
Unable to understand this assembly x86 code	+1.77
Windows kernel32.dll only assembly draw pixel	0.00
doing seemingly un-needed ops (crackme)	+1.78
How Does BIOS initialize DRAM?	+1.01
In full virtualization context, what happens on guest OS system cal...	0.00
What happens to a process running in a CPU when it goes offline	0.00
Kinds of IPI for x86 architecture in Linux	0.00
Multi threading with Millicores in Kubernetes	+1.44
The difference between `entry_SYSCALL64_slow_path` and `entry_SYSCA...	0.00
Why syscall/sysret in legacy mode is considered "sufficiently...	0.00
NUMA information in /proc/vmstat	0.00
assembly - call printf with 64 bit memory content	0.00
Can kernel code make things read-only in a way that other kernel co...	0.00
Why it's not slow when watching movies on storage	0.00
How stosd works in assembly?	0.00
What is the use of struct cpufreq_policy in Linux Kernel CPU Freque...	0.00
Does AMD support x2APIC?	0.00
How Kubernetes computes CPU utilization for HPA?	+0.32
What is wrong with this function (written in assembly) to print hex...	0.00
How to get the machine code from Mars simulator	0.00
Verifying halting-problem on self-implemented pseudo-assembly	-0.52
How does processor read BIOS from SPI flash?	0.00
Does CPU time slicing work on Node.js with or without worker thread...	0.00
What does ID3D11Device::CreateBuffer do under the hood?	-2.54
Conflicting alignment rules for structs vs. arrays	+1.67
Can the A20 line still be masked off on Haswell and successors?	0.00
Is there any difference in between (rdtsc + lfence + rdtsc) and (rd...	0.00
Assembly safes and keys- why it won't work?	0.00
Load-Acquire/Store-Release and interrupts	+1.23
If a microprocessor and bus have different bit systems, is the micr...	0.00
Returning a struct in SystemV ABI	0.00
ANTLR4 Grammar for parsing x86 Assembly	0.00
Which registers to use as temporaries when writing AMD64 SysV assem...	0.00
How does x86 assigns interrupt number for PCI device in Linux?	0.00
Why do we have instructions such as RDRAND instead of an I/O which...	0.00
What is the difference SSE and SSEUP in x86-64-psABI chapter 3.2.3?	0.00
Confused by strace output of a simple helloworld nasm program	+0.31