StackRating
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Rating Stats for
Satheesh.R
|
Rating 1502.11 (358,864th) |
Reputation 44 (1,107,668th) |
Page: 1
| Title | Δ |
|---|---|
| Is it written in VHDL or Verilog | +1.99 |
| Verilog Testbench Implementation | 0.00 |
| Pass parameters in Verilog | +0.13 |