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Rating Stats for

CliffordVienna

Rating
1513.74 (49,692nd)

Reputation
5,589 (29,382nd)

Page: 1 2 3

Title	Δ
Awk: Match column values from 2 files if their numerical values are...	+3.53
Solving System of Equations:	-0.08
How to grep "\n" in file	+5.65
Can't get Git to correctly handle CRLF problems with Eclipse launch...	-3.69
Find duplicate elements in associative array with non consecutive i...	+4.26
Is it possible and correct to form union from bit-field in C?	+4.28
How to find the optimal sum	+1.91
Checking fftw3 with valgrind	+2.00
#define SQR(x) x*x. Unexpected Answer	-2.09
Compile file in linux and run in windows	0.00
Nested Loops C programming - I need to scan input to find sets of l...	+3.84
Verify Combinatorial CNF SAT Encodings?	0.00
What is a clause when talking about CSP/SAT?	-3.29
Verilog syntax for declaring a wire	-3.46
Proper Way to define a vector?	-3.53
Program to create a Verilog block diagram	-0.25
some mathematical operations in CUDA	-3.55
Using Quartus from command line	-4.17
GIT copy file preserving history	0.00
Verilog always block statement	-2.16
Behaviour of sizeof() in C (GCC)	+4.35
Generate statement inside verilog task	+3.95
Automatic flag for compiler directive based on synthesis/simulation...	+0.40
How to design a 64 x 64 bit array multiplier in Verilog?	0.00
Verilog gate level parser	+0.11
Verilog access specific bits	+3.97
How to pass array structure between two verilog modules	0.00
Boolean formula encoding	+4.70
LD_PRELOADed libraries and child process	0.00
call printf using va_list	0.00
Python nested functions variable scoping	0.00