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Rating Stats for

Peter Cordes

Rating
1575.42 (3,453rd)

Reputation
156,434 (349th)

Page: 1 ... 15 16 17 18 19 ... 92

Title	Δ
WriteConsoleA output includes too many characters	0.00
Assembling MULS instruction on ARM with gcc and as	-1.55
Are the cmpxchg esp, eax instructions the same as the icebp instruc...	0.00
Fastest method to calculate sum of all packed 32-bit integers using...	0.00
How do I monitor the amount of SIMD instruction usage	0.00
assembly instruction length of 32-bit program	+1.80
Linux process stack overrun by local variables (stack guarding)	0.00
How to achieve a StoreLoad barrier in C++11?	-0.49
Speedup by AVX2 and AVX512	0.00
Dividing packed 16-bit integer with mask using AVX512 or SVML intri...	0.00
Micro optimization: Returning from an inner block at the end of a f...	+0.40
Cache Misses L1 < L2 < L3	0.00
Is there a way to find addresses of the code sections (.data, .text...	-2.55
Is L2 HW prefetcher really helpful?	+2.11
Compiler explorer and GCC have different outputs	0.00
What is the purpose of GNU assembler directive .code16?	0.00
Need an overview of debugging process from the hardware layer	0.00
When does the pipeline take 2 decode stages when there is a RAW dep...	0.00
Conditional move (cmov) in GCC compiler	0.00
Absolute addressing using PC-relative addressing in a relocatable p...	0.00
linux x86_64 nasm assembly syscalls	0.00
movzx and cwd - are they interchangable?	-2.32
Does use of hash tables cause memory fragmentation?	0.00
Boost: Unable to build a shared library on x86	0.00
Should I use a barrier while accessing statically initialized varia...	0.00
Converting packed 64-bit integers to packed 8-bit integers with sig...	0.00
Does Linux 3.1 support Intel Optane?	0.00
Conflicting alignment rules for structs vs. arrays	-1.67
What is width of data path between Memory Controller and Cache in I...	0.00
Why can't GCC assume that std::vector::size won't change in...	0.00
Is there a way to measure latency of multiple loads in parallel in...	0.00
Why different assembling code generated? Which is better?	-1.39
MARS MIPS simulator's built-in assembler aligns more than reque...	0.00
How do I make an infinite empty loop that won't be optimized aw...	+0.49
Behavior of LDR on a uint8_t variable in ARM?	-2.45
How does one compute FLOPS from time elapsed for a computation?	0.00
Can compilers ever optimize variables to use less than a byte of sp...	0.00
How to use gnu gcc flag -mpc32, -mpc64 and -mpc80?	0.00
C++ variable reset to 0 after calling x64 assembly function	0.00
Possible GCC bug when returning struct from a function	+1.98
variable size element lock free queue	-0.10
Assembly: Purpose of loading the effective address before a call to...	+1.64
Is there a list of registers used by different x86_64 operations an...	+2.00
Why is default operand size 32 bits in 64 mode?	0.00
How can you insert a NaN into a xmm register?	0.00
Create an arg array for execve on the stack	-0.97
Should CPU time always be identical between executions of same code?	-1.99
Perf Reports Some Direct Jump Instructions as Memory Access Instruc...	0.00
Copying 64 bytes of memory with NT stores to one full cache line vs...	0.00
IBM example code, non re-entrant functions doesn't work in my s...	-0.34