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Peter Cordes

Rating
1575.42 (3,453rd) 		Reputation
156,434 (349th)
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Title Δ
How to take the high part of __m256 0.00
Disabling all AVX512 extensions 0.00
Is there difference between Process Control Block's program cou... 0.00
Does the order of class members affect access speed? +1.58
Validating User Integer Input in MIPS Assembly 0.00
im trying to figure out why this x86 assembly code to ID palindrome... 0.00
How can the x86 processor fetch the instruction just after GDT is l... 0.00
How many instructions need to be killed on a miss-predict in a 6-st... 0.00
How to run 32 bit binaries on AWS lambda using Python 0.00
Fastest way to initialize a __m128i constant with intrinsics? 0.00
Wrong Perf Backtraces 0.00
Do all x86-64 implementations support the CMOVcc instructions? +0.41
What is the real address of `%fs:0xfffffffffffffff8`? 0.00
Only prints out the first letter of each variable don't know why 0.00
which MOV instructions in the x86 are not used or the least used, a... 0.00
How can I swap 2 integers in C using bitwise operators and bit mani... -1.02
Intel Pin Modifying Instruction Addresses +0.40
How can I deduce whether the address at hand is part of an array, f... -2.41
Is there a way to make gdb give a detailed assembly instructions? 0.00
How to copy a register and do `x*4 + constant` with the minimum num... 0.00
How to load a avx-512 zmm register from a ioremap() address? 0.00
How to use cmp to compare two literals 0.00
How to convert negative integer to string and output it in MASM Ass... -0.19
Why does adding an xorps instruction make this function using cvtsi... 0.00
Read file from a specific position in x86 +0.37
Clock Cycles for the invlpg instruction -0.05
How to save String input from user and terminate after the second l... 0.00
In c++, can we guarantee a happen-before between two threads by vol... -0.16
How do I reverse the line order of a multi-line string in MIPS? 0.00
Why does the latency of the sqrtsd instruction change based on the... 0.00
Assembly clone syscall thread function not called 0.00
NASM Segmentation fault when modifying a variable that should be in... 0.00
Can a “PUSH” instruction's operation be performed using other i... 0.00
`atomic_compare_exchange_strong_explicit()` -- what do the various... 0.00
SYSENTER on Intel CPUs 0.00
Move data from memory(could be of any length) to XMM 0.00
Does a ROB exist in CPUs with in-order pipe-line? 0.00
What is a reasonable minimum number of assembly instructions for a... +0.82
Any idea how Linux determines which string should be printed in a k... 0.00
Are Extended general-purpose and special-purpose registers supporte... 0.00
Is Assembly Language syntax the same for different architectures -0.81
CF, OF in flag register during data overflow 0.00
Result of my implementation of memset only prints the changes, and... 0.00
Use a membarrier inside a docker container -0.08
ARM Assembly Vector table definition - why vector defined this way? 0.00
How to traverse a string in assembly until I reach null? (strlen lo... 0.00
How to get function Argument from Stack - Assembly 0.00
Why does not AVX further improve the performance compared with SSE2? -0.07
illustrate a code expressing both a data hazard and a control hazard? 0.00
How can I show that volatile assignment is not atomic? +0.82