| Title |
Δ |
| CMP instruction behaving weirdly if operand is over 127?
|
0.00 |
| What determines CPU cycle time
|
0.00 |
| Is calling `add` on a memory location faster than calling it on a r...
|
+2.34 |
| Why do compilers insist on using a callee-saved register here?
|
0.00 |
| What is the difference between __i686.get_pc_thunk and __x86.get_pc...
|
-2.27 |
| What is the function of parentheses in MIPS?
|
+1.40 |
| Is the memory returned from mmapping /dev/shm Write-Back (WB) or No...
|
0.00 |
| How does a return address register work in a processor architecture...
|
-0.74 |
| Is there a way to add three registers together, in a single line of...
|
0.00 |
| Can atomic operations on a non-atomic<> pointer be safe and f...
|
0.00 |
| Are Intel TSX prefixes executed (safely) on AMD as NOP?
|
0.00 |
| SIMD instructions on custom data types
|
0.00 |
| x86-64 instruction set, AT&T syntax, confusion regarding lea an...
|
0.00 |
| How C++ Standard prevents deadlock in spinlock mutex with memory_or...
|
0.00 |
| Finding the op and funct codes of a MIPS syscall
|
0.00 |
| Why does GDB 'x/w' and 'x/g' show different values?
|
0.00 |
| Is it possible to access the procedure linkage table in NASM?
|
0.00 |
| How to convert a boolean expression into assembly code
|
+1.38 |
| cache coherency issue between two cores on same processor
|
0.00 |
| Is there a website or tool for parsing, breaking down, and explaini...
|
0.00 |
| Using TYPE instruction assembly MASM x86
|
-2.01 |
| Comment syntax ambiguity under GAS ARM target
|
0.00 |
| A readers/writer lock... without having a lock for the readers?
|
+0.38 |
| What is the bit representation of a single float number inside ymm0...
|
0.00 |
| Why the time needed for executing code on "Hackerrank" si...
|
0.00 |
| How to convert 64 bit function to 32 bit to 16 bit to 8 bit?
|
0.00 |
| Can virtual memory be used to support Data Breakpoint feature in i3...
|
0.00 |
| Converting llvm IR to NASM assembly
|
0.00 |
| Why didn't printf print out the string in this buffer overflow?
|
0.00 |
| Problem to store value ​from register into memory, ARM 32 bit
|
0.00 |
| Why do kill dependency instructions consume reservation station slo...
|
0.00 |
| `movaps` vs. `movups` in GCC: how does it decide?
|
+2.17 |
| Making a system call in GAS and using variables in .data section an...
|
0.00 |
| Absolute value without branching or shifts, only add/sub and booleans
|
+0.38 |
| Is TLB inclusive?
|
0.00 |
| Memory available to assembly program in Linux
|
0.00 |
| Vectorize random init and print for BigInt with decimal digit array...
|
0.00 |
| Can a register hold multiple values at a time?
|
+2.35 |
| What is the maximum physical memory?
|
0.00 |
| Converting a loop from x86 assembly to C language with AND, OR, SHR...
|
+0.39 |
| pragma omp for simd does not generate vector instructions in GCC
|
0.00 |
| Cast from double to __m128
|
0.00 |
| Impact on performance when having multiple returns
|
0.00 |
| When use write-through cache policy for pages
|
0.00 |
| x86 disassemble, involves modular hashing
|
0.00 |
| Micro Optimization of a 4-bucket histogram of a large array or list
|
+0.38 |
| Why do you have to dereference the label of data to store something...
|
0.00 |
| what do the # numbers in *.i files represent
|
0.00 |
| Sum elements in array using x86 assembly
|
-2.22 |
| Converting [symbol + constant] Intel syntax addressing mode to AT&a...
|
-2.03 |