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Rating Stats for

Peter Cordes

Rating
1575.42 (3,453rd)

Reputation
156,434 (349th)

Page: 1 ... 10 11 12 13 14 ... 92

Title	Δ
X86 linearizability?	0.00
register and memory, risc-v	0.00
Profiling resident memory usage and many page faults in C++ program...	0.00
Do memory barriers prevent branch prediction?	0.00
Are memory orderings: consume, acq_rel and seq_cst ever needed on I...	0.00
Why memory_order_release support until C++20?	-1.06
C11 Standalone memory barriers LoadLoad StoreStore LoadStore StoreL...	0.00
Why is no value showing up in the rax register?	0.00
Do any CPU architectures use Metadata?	+0.42
How can I gather single bytes with AVX512 intrinsics, given a vecto...	0.00
invalid instruction suffix for mov?	0.00
In x86-64 do we always do pushq when we want to push something on t...	0.00
Why does false sharing still affect non atomics, but much less than...	0.00
what self-written asm don't match bochs	0.00
mix c and assembly cortex-m0	-2.86
Why does higher core count lead to higher CPI?	0.00
Offset before square bracket in x86 intel asm on GCC	0.00
C++ latency increases when memory ordering is relaxed	0.00
Left Rotate Problem in Even/Odd Sum using Tracer SCO Debugger Assem...	0.00
why does long long 2147483647 + 1 = -2147483648?	-0.60
Quick sort using ARM assembly - segmentation error	0.00
Does hardware memory barrier make visibility of atomic operations f...	0.00
What is the Linux 64 Assembly Equivalent for C's system call?	0.00
What is stored in $ra before we perform JAL in a recursive function	0.00
sending input from file descriptor	0.00
What's the difference between "statically linked" and...	0.00
Are relaxed atomic store reordered themselves before the release? (...	-0.61
Can you check a flag on a byte, AND retrieve the remaining 7-bit in...	0.00
Hello world cross compiled for ARM is runing on both x86_64 and ARM	0.00
Generate and optimize FP / SIMD code in the Linux Kernel on files w...	0.00
Hello, world in assembly language with Linux system calls?	0.00
In asm volatile inline PTX instructions, why also specify "mem...	0.00
creating shellcode problems with mov reg to reg	0.00
Is an extra move somehow faster when doing division-by-multiplicati...	+1.48
Optimizing an incrementing ASCII decimal counter in video RAM on 7t...	+1.29
Should I look up both Intel and AMD x86 Instruction Set reference f...	0.00
What does the "denormal input" exactly mean in assembly w...	0.00
What is an assisted/assisting load?	0.00
What does "1.234 CPUs used" mean in perf output?	-0.10
Why shouldn't I catch Undefined Instruction exception instead o...	0.00
How stable is TSC (TimeStamp Counter) from user space for Intel x86...	0.00
How do I vectorize data_i16[0 to 15]?	0.00
Why did additional pointer arguments disappear in assembly?	-0.60
Does x64 support imply BMI1 support?	0.00
x86 explanation, number of function arguments and local variables	+1.99
asm function with c++	+2.04
How would '1+1' look when just using 1 and 0?	0.00
What's wrong with my assembly Bubble Sort?	0.00
Is it possible to avoid copying from another section in stack initi...	0.00
How to verify constraints of LR/SC sequence (RISC-V ISA)	0.00