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Peter Cordes

Rating
1575.42 (3,453rd) 		Reputation
156,434 (349th)
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Title Δ
What is the most efficient way to zero all bits below the most sign... +2.12
Unable to inject valid instruction pointer during exploit 0.00
How do RIP-relative variable references like "[RIP + _a]"... 0.00
cant understand why certain variable is being altered 0.00
Why branch delay slot is deprecated or obsolete? -0.37
Unresolved external symbol __aullshr when optimization is turned off +1.72
Can I use SIMD intrinsics for software that runs on cloud? 0.00
how can I determine the decimal value of a 32bit word containing 4... 0.00
How to use c++ template to conditionally compile asm code? +1.37
How to test my dll file written in fortran? 0.00
Does stack space required by a function affect inlining decisions i... -2.12
solution to rdtsc out of order execution? 0.00
How to locate path to Intel Compilers directory needed to build mpi... -0.12
Any chance to accelerate recurrent code with SIMD? +1.75
Link 32bits library on 64bit system and program 0.00
Throughput FMA and multiplication on X86 Broadwell 0.00
Does the NT Kernel not utilise Multiple Memory Channel Architecture? -0.54
error: inlining failed to call always_inline 0.00
Is mov + mfence safe on NUMA? 0.00
How sqrt() of GCC works after compiled? Which method of root is use... +1.48
Where are static values stored in assembly +1.09
Is there a potential bug in my `cat` function? 0.00
User space CR3 value when PTI is enabled 0.00
RDTSCP in NASM always returns the same value 0.00
How to convert a memory address to a code segment address? 0.00
Implementing 64 bit atomic counter with 32 bit atomics 0.00
Can CALLF (Far Call) has a 64 bit address memory operand in Intel 6... 0.00
How is computer with FPU classified in Flynn's taxonomy? 0.00
For a arithmetic operation computer can use binary code or direct b... 0.00
Using a user defined entry point in assembly x86-64 nasm when compi... -2.41
Can we say that an x86 CPU has data types? +1.15
Intel compiler doesn't recognise identifiers from gcc' avxi... 0.00
How does the _mm256_shuffle_epi8 make sense in this Game of Life im... 0.00
Is it more efficient to touch fewer registers in ARM assembly? +0.75
Check that register is a negative 4 bytes value in NASM +1.59
C++ performance std::array vs std::vector -0.53
What is the difference between int3 instruction and call __debugbre... 0.00
update integer array elements atomically C++ -2.11
What is the idea behind ^= 32, that converts lowercase letters to u... -1.74
Crash with icc: can the compiler invent writes where none existed i... 0.00
_mm_lfence() time overhead is non deterministic? +0.36
Intel REX Encoding of PUSH 0.00
Intuition about memory layout for fast SIMD / data oriented design +0.10
Why/how does gcc compile the undefined behaviour in this signed-ove... +1.79
How can x86 bsr/bsf have fixed latency, not data dependent? Doesn&#... +0.93
x86 instruction "movb $5, var(,1)" 0.00
MOV to register from memory not working with BITS 32 in nasm +0.25
Setting and clearing the zero flag in x86 -0.40
How to use _mm_extract_epi8 function? +0.39
Understanding Assembly vs C counterpart 0.00