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Peter Cordes

Rating
1575.42 (3,453rd) 		Reputation
156,434 (349th)
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Title Δ
What is the relation between AVX and Floating Point, and why is AVX... +2.31
How do Intel CPUs that use the ring bus topology decode and handle... -0.36
ARM assembly. Is it safe to use r13 (stack pointer) as a general pu... +0.37
what is meant "seg fs" in the linux kernel bootsect.s file +0.37
Assembly x86 using 32bit. How can I jump to a label if my condition... 0.00
Type punning between integer and array using `union`? -0.51
Can I apply the C11 `_Atomic` keyword to enum types? -2.26
Most efficient popcount on `__uint128_t`? 0.00
Estimate Core capacity required based on load? 0.00
cuda "rounding modes" of reciprocal functions 0.00
Reverse-engineering asm using sub / cmp / setbe back to C? My attem... +0.36
Save value in byte of var in assembly 0.00
Does (p+x)-x always result in p for pointer p and integer x in gcc... +0.97
What is a valid pointer in gcc linux x86-64 C++? +0.59
Small branches in modern CPUs 0.00
Porting AT&T inline-asm inb / outb wrappers to work with gcc -m... -0.78
Contention for read shared data in memory? -1.74
libsimdpp slower then debug gcc 0.00
Handling calls to (potentially) far away ahead-of-time compiled fun... 0.00
Why wasn't MASKMOVDQU extended to 256-bit and 512-bit stores? 0.00
Why doesn't Ice Lake have MOVDIRx like tremont? Do they already... 0.00
Processor can use RAM directly or Not? +0.36
Implementations for asm("nop") in windows -1.57
Linking 2 object files? +0.38
How is a 15 bytes instruction transferred form memory to CPU? +1.12
Check all bytes of a __m128i for a match of a single byte using SSE... 0.00
x86 instruction prefix decoding -0.63
Does Harvard architecture has von Neumann bottleneck? 0.00
In the arm-none-eabi-gdb simulator, ldr from the program entry poin... 0.00
Why does _mm_mfence() produce counts for the ALL_LOADS perf event? 0.00
Size of store buffers on Intel hardware? What exactly is a store bu... 0.00
Cross-platform assembly ((x64 || x86) && (Microsoft x64 ||... 0.00
Fastest way to find the row-wise maximum over submatrices 0.00
Why does the asm code function in C, takes more time than the c cod... -1.67
Can I make a C++ method in external assembly (function.asm)? -2.56
Optimise Simple Stencil Operation keeping variables into registers +1.60
How do I determine the architecture of an executable binary on Wind... -0.56
Arm inline assembly volatile caused compute result error in clang w... +0.36
How to get the size of a function in bytes in GNU assembler with In... 0.00
In x86 Intel VT-X non-root mode, can an interrupt be delivered at e... 0.00
Does arm 64 ret instruction pass x0' value to the function'... 0.00
Reading a cacheline vs parts of a cacheline in Intel x86 0.00
Are caches of different level operating in the same frequency domain? +1.58
ascii char to char conversions Assembly x86? +1.53
What is the most important feature of caches in scientific computing? 0.00
How are inline functions compiled to assembly? -2.38
Normalizing a two complement number -0.30
A general question on memory management for variables in assembly/C +1.35
How to check if the register has a even value? 0.00
How to convert / encode a negative number as an immediate in MIPS m... +0.37