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Rating Stats for

Peter Cordes

Rating
1575.42 (3,453rd)

Reputation
156,434 (349th)

Page: 1 2 3 4 5 6 7 ... 92

Title	Δ
Check to see if a string is a palindrome without punctuation	0.00
Why is calling snprintf() so slow?	0.00
Bomb Lab Assignment Phase 5 - Writing Its C Equivalent	0.00
convertion of four packed single precision floating point to unsign...	0.00
Efficient computation of the average of three unsigned integers (wi...	-0.95
How can I tell Google Benchmark to not benchmark a line of code?	-0.65
needs to understand the meaning behind 0x7fffffff and 0xffffffff800...	0.00
Why does cmov always return t_val?	0.00
Please help to understand the following memcpy code from GLIBC_2.14	0.00
Use raw binary blob of instructions in C code	0.00
Cleanest way to check input char is between 0~9 in Assembly	0.00
GCC isn't enabling D_FORTIFY_SOURCE, even with optimisation fla...	0.00
4-way bytewise interleave 4x 16-byte vectors from memory, with AVX512	0.00
Order of assignment produces different assembly	0.00
Can the AMD64 ISA work without licensing the x86 ISA?	0.00
How do I know whether I'm looking at a CISC or RISC instruction...	0.00
What lock-free primitives do people actually use to do lock-free au...	0.00
Find the INDEX of element having max. absolute value using AVX512 i...	0.00
Using SIMD, how do I conditionally move only the pixels with an alp...	+0.42
Why does 2's complement sign extension work by adding copies of...	0.00
gcc not autovectorising matrix-vector multiplication	0.00
What is the "X" part of the encoding of the r8-15 registe...	0.00
Assembly OFFSET used twice in one instruction, what is offset of of...	0.00
How can we expect a program to complete in order?	0.00
Which register does store cmp result in arm?	0.00
Simple instruction encode	0.00
why non-pic code can't be totally ASLR using run-time fixups?	+1.52
std::atomic<bool> lock-free inconsistency on ARM (raspberry p...	-0.12
How to get the size of nasm-assembled instructions in boot sector?	-0.39
Why bitops in linux kernel performance in slower than mine?	-2.53
Stored Program Computer in modern computing	+1.33
L1 caches usually have split design, but L2, L3 caches have unified...	0.00
Some confused regarding to Rust memory order	0.00
Why is sizeof std::mutex == 40 when cache line size is often 64 bytes	+1.14
register allocation --- how to utilize and spill the caller saved r...	+1.79
Prevent GCC from using dynamic jumps / functions invocations	0.00
When to use a certain calling convention	0.00
Can a speculatively executed CPU branch contain opcodes that access...	0.00
NASM include only references like labels but not the code	0.00
Haswell AVX/FMA latencies tested 1 cycle slower than Intel's gu...	0.00
Why do read and write barrier for x86 in glibc not use __volatile a...	0.00
[[carries_dependency]] what it means and how to implement	0.00
Fastest way for indexed array stores in AVX512?	0.00
Check if a number is even	+2.00
Compiling C to 32-bit assembly with GCC doesn't match a book	+1.70
Return values and constraints for asm (assembler code) using gnu Ex...	0.00
Why does x86 only have 1 form of conditional move, not immediate or...	0.00
Argument order to std::min changes compiler output for floating-point	+1.73
Checking the sign of one or more numbers	0.00
Doing something in assembly vs having the assembler do it	0.00