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Rating Stats for

Chick Markley

Rating
1553.05 (7,102nd)

Reputation
1,560 (105,281st)

Page: 1 2 3

Title	Δ
What does Flipped() do in Chisel3?	0.00
Running specific tests and getting Verilog from a Chisel project ba...	+3.83
Why use BitPat of Seq[(BitPat, T)] in chisel3.util.Lookup.scala	0.00
Errors related to output initialization is produced when using deco...	0.00
What is Clone in Chisel	0.00
What does the Queue Standard Library Interface of Chisel 3 synthesi...	-2.81
Chisel: Resolvers Key in build.sbt	0.00
Chisel -- clock gating	-4.25
How to create a vector of vector when I'm defining IO	+1.65
How to create a vector of vector when I'm defining IO	+3.88
Getting warning when there is an unconnected IO in the design	+3.91
chisel-testers SteppedHWIOTester with multi clock domains	0.00
How to generate harness in Chisel3	0.00
Indexing of elements in a Seq of string with chisel	0.00
chisel sorting of an array with index	0.00
How to get size of UInt() in chisel?	0.00
Chisel3: How to get verilog,cpp and vcd files simultaneously	0.00
How can I make a blackbox in chisel 2.0?	0.00
chisel k Nearest Neighbors verilog output	0.00
chisel3: Want to use Vec, but need to use IndexedSeq	0.00
Chisel3 type mismatch with Array of FixedPoint	0.00
chisel3 arithmetic operations on Doubles	+3.89
How to use "hierarchical path" of chisel/scala?	0.00
Chisel code translating into Verilog/C++	+0.08
Chisel3: Partial assignment to a multi-bit slice of a Vector IO	0.00
Chisel: How to model a variable incremented in a unrolled loop	+3.95
Chisel3: Bitwise negation operator	0.00
why chisel UInt(32.W) can not take a unsigned number which bit[32]...	+4.17
error when using SteppedHWIOTester in Chisel	0.00
Controlling the VCS command line when using PeekPokeTester	0.00
Using ScalaCheck with PeekPokeTester	0.00
How to Initialize a Register of Vectors?	0.00
In Chisel test bench, how to write two independent interface proces...	0.00
Test multiple decoupled input ports using OrderedDecoupledHWIOTester	0.00
Matrix Operations in Chisel	0.00