StackRating

An Elo-based rating system for Stack Overflow

Home | About | Stats and Analysis | Get a Badge

Rating Stats for

Notlikethat

Rating
1583.46 (2,724th)

Reputation
15,833 (8,842nd)

Page: 1 2 3 ... 9

Title	Δ
Checking if ARM is in supervisor mode or interrupt mode during kern...	+0.38
I can't understand some instructions in ARM: SBC, RSC	0.00
Cannot boot from FIT image	0.00
Disable CPU caches (L1/L2) on ARMv8-A Linux	0.00
Cross compiling - Error: selected processor does not support `fmrx...	0.00
How to generate memory management fault in cortex m3 based microcon...	0.00
Linux on arm64: sendto causes "Unhandled fault: alignment faul...	0.00
Are armv8 and arm64 the same?	0.00
Error when accessing vector table	0.00
ARM32 embedded: Using timers in polled mode	0.00
Linux Device Tree: How to make the device file?	0.00
Armv7: return frome exception to Thumb Code	0.00
Can coherency issue happen between secure DMA and non-secure CPU on...	0.00
Long conditional branches in Thumb-2	-2.51
How to get the low 16-bit half-word most efficiently on ARM (ARM7TD...	0.00
How to add all int32 element in a lane using neon intrinsic	0.00
arm instruction width specifiers cannot be compiled	0.00
Merging two strings in Assembly	0.00
Comparing signed integer in arm assembly	0.00
Differentiate data from instructions in ARM	0.00
Overeager struct packing warnings with `__attribute__((packed))`?	+0.38
Unknown symbol in module / v7_flush_dcache_all undefined in linux k...	0.00
gcc plugins with arm64 cross compiler : cannot open shared object f...	0.00
Is a PREEMPT-ible Linux kernel Real Time?	0.00
ARM Assembly - what's the difference between v1 and a1 registers?	0.00
ARM Interrupt Handler	+1.02
"Illegal instruction" when running ARM code targeting my...	0.00
Temporarily disable interrupts on ARM	+0.33
How do I escape m4 definitions in a string?	0.00
ARMsim: input-wait loop swi 0x203 0x202	0.00
ARM assembly. Storing and loading data from stack with negative off...	0.00
Can someone explain how LDRD arm instruction works?	0.00
in arm7tdmi, when FIQ and RIQ occures at same time so how both are...	0.00
VLD3.8 in NEON ASM doesn't work like the vld3q_u8 documentation...	0.00
Logging and debugging unaligned accesses on Linux / aarch64	0.00
Get alignment in ARM Assembly preprocessing	0.00
Compile-time register checks for Thumb-2 code	+0.37
How to give a different name to a register in GNU ARM assembler?	+0.38
Compiling to ARM I get "Error: attempt to use an ARM instructi...	0.00
Intrinsics Neon Swap elements in vector	0.00
ARM Neon: Store n-th position(s) of non-zero byte(s) in a 8-byte ve...	+1.46
Why do we need to specify the number of flash wait cycles?	0.00
LSB of ARM7TDMI link register on external interrupt (IRQ) call from...	0.00
Using -fno-unwind-tables in conjunction with -fno-exceptions	0.00
ARM Neon: adding adjacent twice to average four adjacent pixels	0.00
Is there a ARM processor support on-chip hardware random number gen...	0.00
Introductory ARM - Assembly Error	-2.09
PoU with non-shareable attribute	0.00
Get dev library packages for arm on x64 Ubuntu host?	0.00
CLion, CMSIS and error: "expected identifier or '(' be...	0.00