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Notlikethat

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1583.46 (2,724th) 		Reputation
15,833 (8,842nd)
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Title Δ
Do initrd really reduce kernel image size in case of Bootpimage? +1.71
error in pointer assignments in c on armv5 0.00
Expression in GCC ARM assembly macro 0.00
CMP/BEQ not working Always branching (ARM) -0.62
Hardfault on STM32F030 startup, __libc_init_array 0.00
Fix "error: unknown register name ‘r0’ in ‘asm’" 0.00
Grouping Figures separately into windows and tabs 0.00
AREA Field in ARM Assembly +1.32
arm instruction ldr error on gcc works fine on armcc 0.00
How to use STC instruction in the ARM 0.00
Restoring Thumb state in user mode +0.43
Raspberry Pi ldrex causes data abort 0.00
ARM NEON convert f32 to s32 with round toward even 0.00
Predefined cpu target macro for Cortex-M0+ 0.00
C pread gives different results 0.00
ARM doesn't generate unaligned exception -0.12
Interrupt handling on SAMA5D3 0.00
IDA PRO: How to modify a subroutine to always return true? 0.00
ARM atomics performance 0.00
Why is PC still 32 bits in Thumb mode on ARM processor? +1.47
Running 32 bits and 64 bits OS with arm v8 0.00
Cross compiling a kernel module ARM -0.61
How the arm link register r14 works +2.08
ARM Cortex-M4, Read/Write using UART_DR and FIFO +1.50
ADD or SUB with only two operands in ARM +2.07
Register mapping in a ARM based SoC -0.07
How to try cache invalidation and cache clean in ARM? 0.00
ARM Machine/Board ID 0.00
How to link iPad Air app (arm64) against existing armv7 static libr... 0.00
stp aarch64 instruction must be used with "non-contiguous pair... 0.00
Error compiling Kernel-aodv for ARM 0.00
oprofile: what does "[vectors] (tgid:20712 range:0xffff0000-0x... 0.00
Backwards compatibility of ARM v7 ISA to ARM v2 ISA 0.00
Does a pipeline stall occur on an ARM to Thumb switch? -0.07
Effective use of vmlaq_s16 0.00
Efficient method to flush cache memory in ARM assembly 0.00
ABI call to __aeabi_idivmod doesn't behave as expected 0.00
ARM Cortex-M3 startup file 0.00
ARM LDR instruction on PC register -2.14
Understanding the nature of ARM PC register 0.00
Extracting the MBR from a raspberry Pi 0.00
How to determine if carry out occuurs in C 0.00
ARM single-copy atomicity 0.00
Enabling external aborts on an ARM CPU 0.00
Are there small registers in ARM assembly? +1.57
difference between ldrex/strex and swp 0.00
ARM: Is "STMDB SP!, {R0-R8}" (aka PUSH {R0-R8}) an atomic... +0.11
How do modern cpus handle crosspage unaligned access? +1.58
ARMv4, ARMv5E, ARMv6 assembly usage on iOS devices with ARMv7 and A... 0.00
Strongly-ordered memory and imprecise aborts 0.00