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Answers and rating deltas for
Is there a tool/simulator that supports line coverage for SystemVerilog classes?
| Author | Votes | Δ |
|---|---|---|
| Martin Thompson | 1 | +0.26 |
| toolic | 1 | +0.19 |
| Victor Lyuboslavsky | 0 | -3.57 |
Last visited: Sep 14, 2014, 5:07:29 AM