StackRating

An Elo-based rating system for Stack Overflow
Home   |   About   |   Stats and Analysis   |   Get a Badge
Answers and rating deltas for

Can SystemVerilog represent a flip-flop with asynchronous set and reset without adding unsynthesi...

Author Votes Δ
Andy 3 +3.57
EML 2 +1.97
Greg 1 -1.59
DOS -2 -3.50
Last visited: Sep 14, 2014, 5:07:29 AM