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Rating Stats for

Peter Cordes

Rating
1575.42 (3,453rd) 		Reputation
156,434 (349th)
Page: 1 ... 43 44 45 46 47 ... 92
Title Δ
Order-preserving memcpy in C++ 0.00
Writing pipeline optimized C AVX code in VS 2017 0.00
pycocotools (core dumped). Is it an AVX issue? +1.28
BITswap assembly program -0.08
Does Program Counter hold current address or the address of the nex... -0.64
Using a specific zmm register in inline asm 0.00
Strange/bad assembly output by gcc? 0.00
replace inline assembly tailcall function epilogue with Intrinsics... 0.00
What's the equivalent of vbroadcastsd for xmm registers? 0.00
GCC keeps complaining "error: incorrect rounding operand"... 0.00
SSE operations to implement a loop over a 2D array where each outpu... 0.00
setting/pausing clock time for std::chrono clocks in C++ +1.15
Understanding the impact of lfence on a loop with two long dependen... +1.60
Why does the x86-64 System V calling convention pass args in regist... 0.00
Does `xchg` encompass `mfence` assuming no non-temporal instructions? 0.00
Behavior of unused asm() on unsupported architectures -1.35
Generic pattern for a loop- pintool +1.48
Using time stamp counter and clock_gettime for cache miss 0.00
yasm multiple arbitrary inputs not working when redirecing inputs f... 0.00
Determine if a software solution is 32 or 64-bit dependent? 0.00
How does branch prediction interact with the instruction pointer 0.00
inline assembly constraint for value that might be overwritten 0.00
MIPS bad address/ Exception 0.00
Generating a 64-byte read PCIe TLP from an x86 CPU +2.18
How to change the value on an ADD EAX with C++ knowing the offset 0.00
Referencing memory operands in .intel_syntax GNU C inline assembly 0.00
What do the numbers mean in a disassembled CALL instruction on SPARC? 0.00
push a byte on stack (IA32) 0.00
Multiple Producer Multiple Consumer Lockfree Non Blocking Ring Buff... -0.42
Understanding GCC's floating point constants in assembly listin... 0.00
Constexpr and SSE intrinsics 0.00
When kernel developers want to write assembly, do they write in hig... -2.54
1252-142 Syntax error from AIX assembler due to local label 0.00
How to properly use TSX-NI (both HLE and RTM) when threads might sw... 0.00
Using SIMD to right shift 32 bit packed negative number 0.00
AVX2 code slower then without AVX2 0.00
Encoding JMP in x86 (64 bit mode) 0.00
Why did Intel change the static branch prediction mechanism over th... -0.60
clflush to invalidate cache line via C function -0.42
Can you implement a timer without a "sleep" in it using s... -1.24
Does memory fencing blocks threads in multi-core CPUs? 0.00
How to test AVX-512 instructions w/o supported hardware? +0.45
Why is GDB filling the 0s of a memory address with 5s during a regi... 0.00
Explaining the different types in Metal and SIMD -2.09
Are SSE2 instructions enabled? 0.00
Arithmetic right shift examples in my textbook shift in ones when t... -0.88
Why do we even need assembler when we have compiler? +0.85
How to convert 32-bit float to 8-bit signed char? +0.38
void* array convert element to another type -2.21
IDA: Why does this function/sub has 4 arguments, and why is one a s... +2.15