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Rating Stats for

Peter Cordes

Rating
1575.42 (3,453rd)

Reputation
156,434 (349th)

Page: 1 ... 47 48 49 50 51 ... 92

Title	Δ
Are there deterministic architecture emulators available?	0.00
print character in NASM using write syscall	0.00
Optimization via loop blocking in C	0.00
calculate data miss rate in mips	0.00
Why does clang++ prefer adcx over adc	0.00
How do I get a full assembly code from c file?	-0.75
3-address instruction is too large to fit in one word for a reasona...	0.00
Intel-64 and ia32 atomic operations acquire-release semantics and G...	+0.38
Syscall in android NDK	0.00
Values of a vector are changing when they shouldn't be	0.00
Correct Stack Manipulation in X.86 X64 assembler	0.00
x64 function call arguments push/mov order (MSVC)	0.00
PIC Programming: Moving Literal to File?	-1.36
Globally Invisible load instructions	+1.84
Why addresses of instructions from GDB and Objdump are the same?	0.00
selectively xor-ing elements of a list with AVX2 instructions	+1.49
Gnu assembler .data section value corrupted after syscall	0.00
Automatically generated assembly code for "Hello World!"...	+2.35
Physical core and Logical cores on diffrent cpu AMD/Intel	0.00
SYSCALL_INLINE in Android	0.00
Why does g++ pull computations into a hot loop?	+0.13
What type of addresses can the port 7 store AGU handle on recent In...	0.00
If Statement with And operator condition in AT&T Assembly	0.00
Do I use sockets to send data from device to computer while code is...	0.00
Example assembly language program for stack buffer overflow	0.00
Using 4bit PowerPC CR0 register from GCC	-0.05
Implement numpy's triu_indices with avx in c++	0.00
What is a "control character in ASCII form"?	0.00
Mixing c++ and assembly cant pass multiple paramaters from C++ func...	0.00
Get the last line separator	0.00
How to move single-word data between ARMv7 NEON vectors	-0.45
Are loads and stores the only instructions that gets reordered?	-0.01
Operand type mismatch for `push'	-2.15
What does "serializing operation" mean in the sfence docu...	-0.83
Intel ICC 2018 vs GCC 8 assembly: stack init and finish difference	0.00
Branching to a c symbol from thumb inline assembly	-0.36
How to print EIP address in C?	-0.86
Do VGA cards read in the pixel buffer when the vertical retrace bit...	0.00
Java Micro-optimization: To cache or not to cache a System.currentT...	0.00
Is there any way to generate inline assembly programmatically?	-0.03
How to serve a random element so that each user gets the same rando...	0.00
What does __asm volatile ("pause" ::: "memory")...	0.00
Why is memcpy slow in 32-bit mode with gcc -march=native on Ryzen,...	+1.63
Who is responsible for saving calle-saved registers in MIPS?	+0.44
Constant appearing inline in .text instead of loading from memory	-0.99
How to interpret a dump of binary file?	0.00
Why does p1007r0 std::assume_aligned remove the need for epilogue?	+1.66
Why is the use of the 'DS:' segment override illegal in 64-...	0.00
Is it possible to write to an array second element by overflowing t...	+0.86
What is vmovdqu doing here?	-0.13