| Title |
Δ |
| How can I make Linux system calls from a C/C++ application, without...
|
+1.65 |
| make—can I suppress a format-truncation error?
|
-0.51 |
| Implementing breakpoints that resume safely in multithreaded code
|
-2.11 |
| Is processor can do memory and arithmetic operation at the same time?
|
0.00 |
| What happens when I compile on machine that supports avx2 and run t...
|
0.00 |
| When is it not possible to exploit spatial locality in cache?
|
0.00 |
| assembly 68k - clear starting from address efficently
|
-0.52 |
| GCC highest set of instructions compatible with multiple architectu...
|
-0.04 |
| scanf Segmentation faults when called from a function that doesn...
|
0.00 |
| Does it matter if the non read and non write instructions are reord...
|
0.00 |
| How can I write raw machine code for x86 without using assembly?
|
-0.85 |
| For-loop efficiency: merging loops
|
+1.12 |
| Unexpected x64 assembly for __atomic_fetch_or with gcc 7.3
|
-1.90 |
| What is the opposite of a "full memory barrier"?
|
0.00 |
| Convert __m256d to __m256i
|
0.00 |
| Table with addresses or registers, assembler x86
|
0.00 |
| gcc target for AVX2 disabling SSE instruction set
|
0.00 |
| Understanding PTR in context of Size Directives
|
0.00 |
| What exactly happens when a skylake CPU mispredicts a branch?
|
0.00 |
| Vectorizing indirect access through avx instructions
|
0.00 |
| Golang range over array
|
0.00 |
| How does Out of Order execution work with conditional instructions,...
|
0.00 |
| How does a mutex lock and unlock functions prevents CPU reordering?
|
-1.33 |
| Understanding volatile asm vs volatile variable
|
-0.51 |
| Simple for() loop benchmark takes the same time with any loop bound
|
-1.35 |
| Is it possible to use explicit register variables in GCC with C++17?
|
-0.25 |
| Using ymm registers as a "memory-like" storage location
|
+2.00 |
| x86 assembly mov instruction LILO
|
0.00 |
| x86 assembly works on which CPUs?
|
+0.15 |
| _mm_crc32 giving different results that manual version
|
0.00 |
| Can I run two seperate jupyter notebook files at the same time, wit...
|
0.00 |
| Procedure Call Standard for the ARM® Architecture: 2 separate,...
|
0.00 |
| std::chrono::clock, hardware clock and cycle count
|
+1.91 |
| How to use vindex and scale with _mm_i32gather_epi32 to gather elem...
|
0.00 |
| how to understand if a CPU support ECC?
|
0.00 |
| What does "subsequent read" mean in the context of volati...
|
+1.98 |
| Is it possible, or how hard it is, to change the op code of an inst...
|
-0.09 |
| instrinsic _mm512_round_ps is missing for AVX512
|
0.00 |
| performance degrading with PTI=on in Linux-4.4.0
|
0.00 |
| How to benchmark (track CPU usage of) a short-lived command?
|
0.00 |
| intel xed decoded instruction doesn't perfectly match the 8086...
|
0.00 |
| Does compiler use SSE instructions for a regular C code?
|
+1.84 |
| Loading an xmm from GP regs
|
0.00 |
| How to account for hidden bit in mantissa? MIPS code IEEE-754
|
0.00 |
| From compiler perspective, how is reference for array dealt with, a...
|
+1.15 |
| XOR-ing 2 bytes in assembly language
|
0.00 |
| Accomplishing simple conditional tests with Assembly
|
-2.17 |
| RISC access address greater than largest integer
|
0.00 |
| simple example of NOT instruction in x86 asm
|
0.00 |
| Hijacking function calls by rewriting the address used by the PLT j...
|
0.00 |