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Rating Stats for

JHBonarius

Rating
1499.54 (3,776,328th)

Reputation
3,612 (46,560th)

Page: 1 ... 4 5 6 7

Title	Δ
Arithmetic mean of a register in vhdl	+3.96
VHDL testbench not changing output ALU 32bit	0.00
Wait statement to be synthesizable	0.00
Elevator project in VHDL compiles, but doesn't work in the simu...	0.00
how to make std_logic_vector consist of std_logic_vectorin vhdl	-4.39
How to initialize a VHDL std_logic_vector to "0001"	0.00
VHDL Uninitialized out port has no driver	+3.69
VHDL process get activated when the sensitivity list isn't chan...	-0.32
How does this VHDL code work?	0.00
need to count constants names in vhdl	+4.30
Compare std_logic_vector in a if() condition vhdl	0.00
Unexpected result from VHDL design	-3.46
Entity Instantiation Inside of a Process	+3.92
Using of loop statements and delays inside the states in fsm	0.00
Real-life use of SLA operator in VHDL	+3.92
VHDL - Function/Procedure for any type of array	+3.73
Issue creating a vector	-1.03
How to convert big integers to smaller integers in vhdl?	+4.04
Unsigned multiplication in VHDL 4bit vector?	-3.98
Not understanding how to USE the fft library generated by altera...	0.00
using packages in vhdl	0.00
I am trying to run the following code in Xilinx but i am encounteri...	0.00
VHDL with-select and "AND"	0.00
VHDL synax error in state machine	+4.56
Implementing a 10 bit shift register with led outputs	0.00
VHDL generic comparison and synthesis	-2.63
Print a bit with VHDL (Ubuntu 16.04)	0.00
C++ : Vector assignment in constructor error	+4.03
equivalent function to numpy.random.choice in C++	+4.30
How to add compile option for ModelSim using VUnit?	0.00
Why programm does not work?	0.00
How to wait for an animation to finished in Unity C#	+4.30
Overloading operator+ for const char*	+4.21
NULL statement in VHDL	0.00
Reaching clock regions using BUFIO and BUFG	0.00
UART communication between computer and BASYS 3 FPGA	0.00
VHDL how to generate multiple flip flop entities to use BIT_VECTOR...	0.00
power spectral density from fft result c#	-3.07
How do I setup entity for a 1 to 2^n output demux with n select lin...	0.00
RS latch with VHDL	-1.75
VHDL error in for generate	+0.67
Raise a number to a power that varies in VHDL	-3.93
gtk_widget_add_tick_callback() and gtk_main_iteration()	0.00
VHDL record is not fully constrained	+4.03
Parameterizable VHDL subtypes	+0.34
Booth multiplier puts a 1 in the high 32 bits for a 64 bit register	0.00
VHDL arrays - How do i declare an array of unknown size and use it	-2.16
Overloading with integral parameters: Int16, Int32, Int64 always ca...	-2.62
Incorrect result from a multiplication of Integer	0.00
Better to use block RAM or distributed RAM?	+0.09