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Rating Stats for

Leeor

Rating
1512.40 (55,550th)

Reputation
15,499 (9,054th)

Page: 1 2 3 4 5 6 7 ... 8

Title	Δ
Newbie in Assembly	-0.73
x86 memory ordering: Loads Reordered with Earlier Stores vs. Intra-...	0.00
How to convert a signed integer to a corresponding unsigned integer...	-0.38
Derive performance impact from binary size	+1.48
Cache Memory Blocks Organization	+1.99
isLocked method for use in haswell RTM	0.00
spanning tree including maximum weight	-0.46
Calculating Distance Between Atoms by atomic Coordinates	-1.59
When should we use prefetch?	+0.26
Best algorithm to find anagram of word from dictonary	-1.31
MESI protocol-How to handle INVALID?	0.00
cache vs uncache memory access in embedded Linux	0.00
How can I simulate how machine code executes on a particular Intel/...	0.00
clflush not flushing the instruction cache	0.00
Test app performance by making it lag	0.00
Reorder Buffer in Speculative Execution always needed?	0.00
cpu cacheline and prefetch policy	0.00
can we inspect value in the cache after a read instruction has exec...	0.00
prefetching data at L1 and L2	0.00
How can race conditions be useful?	-1.78
Last used cache line versus different cache lines	+0.42
Why the output of this c++ program is 3	-0.54
Can interpreted languages use delay slots?	+1.93
Should I run JMH benchmarks with '-server' option	-0.49
what is the algorithm for going around anti clockwise	-1.37
Implementing a cache modeling framework	0.00
Memory benchmark plot: understanding cache behaviour	0.00
Efficiently process data in real time and push in database in C	+0.07
loop tiling. how to choose block size?	0.00
Look for string inside of other string and print location in C	-0.24
Cache specifications for intel core i7	0.00
What is the impact SFENCE and LFENCE to caches of neighboring cores?	0.00
In the C if-else statement, should the condition which is more like...	-0.81
Does it make any sense instruction LFENCE in processors x86/x86_64?	+1.91
Given this same piece of code, why is the python version 100x+ slow...	0.00
Does generally RISC processors have lower power consumption than CI...	+0.51
Add decimal digits in Assembly Programming 8086	0.00
inlining a simple assembly function	0.00
Why modern CPUs don't interleave caches?	+2.24
What are the signs of non-data cache misses (instruction, TLB, etc.)?	0.00
Huge performance difference of a C++ program (compiled with GCC) un...	-0.59
generate a random graph with uniform distribution of edges	-1.29
Do compilers produce better code for do-while loops versus other ty...	+0.56
Reconstruct a tree from a list, with depth info encapsulated in the...	-0.70
Why run 16-bit programs on x86 operating systems get slower?	-0.49
How to sort an array in C++ in a specific way	+0.41
Generate an array of numbers from a number and a mask of bits in C++	-1.93
VTUNE results of CPU usage and Concurrency Histogram	0.00
How to use IA32 instruction 'fabs' in VS c++?	+2.69
Correctness of Bellman-Ford Algorithm, can we still do better?	0.00